1 Field of the Invention
The present invention relates to a semiconductor device, and more particularly to a static semiconductor memory which has an improved information retaining characteristics and can operate at a decreased standby current.
2 Description of the Invention
Heretofore, different types of semiconductor devices, which can store binary information or data in terms of electric charges, have been developed and are at present used in various memories such as static memories, dynamic memories, read only memories (ROMs), etc. The reason for this is that a semiconductor memory having high integration density and large storage capacity can be easily obtained because each memory cell can be formed with a very small area. Among these semiconductor memories, the static semiconductor memory has been widely used as an random access memory (RAM), because it can retain stored data indefinitely without periodical refresh operation.
This static random access memory (SRAM) can be implemented by a large number of flip-flop circuits each of which stores one bit of information. Ordinarily, each flip-flop is composed of a pair of enhancement mode insulated gate field effect transistors having a gate connected to one end of a source-drain path of the other transistor. The selected end of each transistor is connected through a load element to a power supply line and is also connected through a transfer gate to a read/write line.
When the flip-flop is put in one condition, one of the transistors is held on and the other transistor is held off. Therefore, an electric current I continuously flows from the power supply line through the transistor held in the ON condition and the load element connected in series thereto. This current I will determine a so-called "standby current" I.sub.SB of the static memory.
As will be seen from the above, this current I is inevitable to each memory cell of the static memory. Accordingly, with increase in density of cells for a larger storage capacity, the standby current is unavoidably increased. Therefore, it is strongly desired to reduce the current I flowing through each memory cell.
On the other hand, this current I is determined by the resistance of the load element and the conductive resistance of the transistor. At present, the load element is, in some case, formed by a resistor composed of a polycrystalline silicon, and this load resistor can have a resistance extremely larger than the conductive resistance of the transistor. Therefore, the current I is determined by the resistance of the polycrystalline silicon resistor.
However, the resistance of the polycrystalline silicon resistor has already approached to its limit, and so, it is very difficult to further decrease the current I. In addition, decrease of the current I will weaken the compensating ability for maintaining the condition of the flip-flop without being subjected to influence of a leak current generated from the high level node. In other words, if the current I is decreased, the information retaining ability is reduced.